💎 Crystal Oscillator Tool

Crystal Oscillator Load Capacitor Calculator — Pierce & Colpitts, AT Cut, HC-49S, Surface Mount

Every AT-cut crystal runs at its printed frequency only when the circuit presents exactly the load capacitance the datasheet specifies. Enter CL, board stray capacitance and pin capacitance — get C1 = C2, the nearest standard value and the achieved load CL instantly.

Crystal Load Capacitor Calculator

C1 = C2 ≈ 2×CL − Cstray − Cpi — live E12 rounding and achieved load CL.

Crystal Load Capacitance CL (pF)

Printed as “Load Capacitance” on the crystal datasheet — 8–32 pF for most AT-cut parts.

PCB Stray Capacitance Cstray (pF)

typical 3–5 pF

Transistor/MCU Input Capacitance Cpi (pF) — optional

Input/pin capacitance of the transistor or MCU pin on one crystal terminal — set 0 if unknown.

Oscillator type

Pierce mode: C1 and C2 sit from each crystal terminal to ground and the crystal operates inductively. Equal capacitor values keep the loop symmetric.

Quick presets

Recommended C1 = C2

33pF

2×CL − Cstray − Cpi = 32 pF ideal

Nearest standard value: 33 pF (E12 series)

Achieved load CL with standard value: 20.5 pF

Deviation vs target: +2.5 pF — loads heavier, pulls frequency low

Target CL vs Achieved CL

Target CL18 pF

Achieved CL with standard value20.5 pF

The gap between the two bars is the standard-value rounding error — every picofarad of gap translates into roughly 20–25 ppm of frequency shift on a typical AT-cut crystal.

💎 Load-cap rule. The two external capacitors appear in series through the crystal while stray capacitance appears in parallel across it — that is why the shortcut subtracts Cstray once, not per side. Round to the nearest C0G/NP0 standard value and check the achieved CL bar before ordering parts.

The CL relationship

What Crystal Load Capacitance Means — the Math Behind Every Crystal Capacitor Calculator

Every quartz crystal datasheet prints a load capacitance spec, CL, in picofarads — typical AT-cut values fall between 8 and 32 pF, with 18 pF and 20 pF the two most common. CL is not a capacitance hidden inside the crystal can. It is the total capacitance the external circuit must present across the crystal terminals for the element to oscillate at the printed frequency. A crystal load capacitor calculator exists because getting that presentation wrong is the single most common reason a crystal runs off-frequency on an otherwise correct PCB.

CL = C1·C2/(C1+C2) + Cstray

C1, C2 — the two external capacitors, one from each crystal terminal to ground.
C1·C2/(C1+C2) — their series combination, which is what the crystal actually sees between its terminals.
Cstray — PCB trace, pad and pin parasitic capacitance, lumped in parallel across the crystal.

The crystal sits between the two capacitors, and from the crystal's viewpoint those capacitors are in series: two 44 pF parts in series present 22 pF, and the board's stray capacitance adds on top of that. Solving the series-plus-stray loop equation for the symmetric case — the case almost every design uses — reduces to the shortcut this crystal oscillator capacitor calculator applies: C1 = C2 ≈ 2×CL − Cstray − Cpi. The stray term is subtracted once, not per side, because Cstray lumps across the crystal terminals while the external pair divides through the element. Cpi is the input capacitance of the transistor or MCU pin that terminates one side and only matters when you know it.

Two practical rules complete the picture. First, use C0G/NP0 ceramic dielectric only — X7R parts change value with voltage and temperature by enough to move CL by whole picofarads. Second, work in picofarads end to end: any xtal capacitor calculator that mixes units invites a 1,000× error, and the difference between 18 pF and 18 nF is an oscillator that never starts.

Hands probing a crystal oscillator circuit on an electronics workbench

Frequency accuracy starts with CLPhoto: Unsplash

Topology matrix

Pierce Oscillator Capacitor Calculation vs Colpitts Crystal Capacitor Calculation

The two topologies you will meet are the Pierce oscillator — one inverter or transistor plus two shunt capacitors — and the Colpitts crystal oscillator, where the crystal joins an LC tank and the capacitors form the feedback divider. The pierce oscillator capacitor calculation and the colpitts crystal capacitor calculation produce the same numbers when C1 = C2, but the capacitors sit in different seats and fail in different ways. The matrix below puts the two side by side with the ranges that matter.

Comparison Dimension	Pierce	Colpitts	Practical Verdict
Feedback element	Crystal runs inductive between amplifier input and output	Crystal sits in the tank; C1/C2 form the divider	Same crystal, different electrical role
Where C1 and C2 sit	One capacitor from each crystal terminal to ground	C1 from active device to tank node, C2 from tank node to ground	Equal values are valid in both
Typical capacitor range	10–33 pF per side (MCU HSE crystals)	22–100 pF per section (discrete RF stages)	One calculator covers both bands
Drive-level control	Set by inverter output drive and the C2/C1 ratio	Set by the divider ratio C1/C2 and supply current	Keep the ratio between 1:1 and 2:1
Where each wins	MCU HSE clocks, RTC modules, lowest BOM count	Discrete RF stages, cleaner spectrum at 20–150 MHz	Pierce for digital boards, Colpitts for RF

In a Pierce stage the pierce oscillator capacitor calculation usually starts from the MCU datasheet, which specifies both CL and an allowed external capacitor range — 10–33 pF covers the overwhelming majority of HSE crystals. The C2/C1 ratio also sets drive level: pushing the ratio beyond 2:1 over-drives low-power tuning-fork crystals, whose maximum drive level sits near 1 µW versus roughly 100 µW for AT-cut parts. In a Colpitts stage the colpitts crystal capacitor calculation has to satisfy two constraints at once — the divider ratio that guarantees loop phase and the series combination that sets CL — which is why discrete designs publish the pair as a matched set, for example 47 pF and 47 pF around a 20 MHz fundamental crystal.

📌 Keep in mind. The Pierce oscillator formula C₁ = C₂ ≈ 2CL works for most fundamental-mode AT-cut crystals. For overtone oscillators or SC-cut crystals, use the specific motional capacitance from the crystal's datasheet — it's not the same as CL from the load capacitance spec.

Three worked examples

How to Calculate Capacitor Value for Crystal Circuits: Three Worked Examples

The fastest way to learn how to calculate capacitor value for crystal circuits is to run three numbers through the shortcut by hand. Each example below takes a real datasheet CL, a realistic Cstray, and produces the pair of parts you would actually order — the same three presets loaded in the calculator above.

Example 1 — 18 pF HC-49S crystal (the default on this page)

An HC-49S through-hole AT-cut crystal specifies CL = 18 pF. The board is a two-layer hobbyist PCB with short traces, so Cstray ≈ 4 pF and Cpi = 0. To calculate crystal load capacitors for this case: C1 = C2 = 2×18 − 4 − 0 = 32 pF. The nearest E12 standard value is 33 pF, so the BOM gets two 33 pF C0G parts. The achieved load is 33/2 + 4 = 20.5 pF — 2.5 pF heavier than target, which pulls the frequency low by roughly 58 ppm, quantified in the tipping-point section below. If the application needs better than ±20 ppm, add 1–2 pF of series trimmer or pick the next value down.

2×18 − 4 − 0 = 32 pF → E12 33 pF → achieved CL 20.5 pF

Example 2 — 20 pF MCU crystal with 5 pF input capacitance

A 20 pF crystal drives an MCU whose OSC_IN pin presents Cpi = 5 pF; the datasheet's pin capacitance table lists it. With Cstray = 4 pF: C1 = C2 = 2×20 − 4 − 5 = 31 pF → nearest E12 value 33 pF. The achieved load with the standard value is 33/2 + 4 + 5/2 = 23 pF, a +3 pF overshoot. This is the case where the optional Cpi field earns its place: ignoring 5 pF of pin capacitance would have suggested 2×36 pF parts and left the crystal loaded 8 pF heavy — a 100+ ppm error on a clock meant to discipline a USB or Ethernet peripheral.

2×20 − 4 − 5 = 31 pF → E12 33 pF → achieved CL 23.0 pF

Example 3 — 32.768 kHz watch crystal, CL = 12.5 pF

The 32.768 kHz watch crystal is a special case worth its own entry. Most tuning-fork RTC crystals specify CL = 12.5 pF, and RTC boards are compact, so Cstray ≈ 3 pF is realistic. The shortcut gives 2×12.5 − 3 − 0 = 22 pF — an exact E12 value with zero rounding error, and the achieved load of 22/2 + 3 = 14 pF is still 1.5 pF heavy. Because tuning-fork crystals have motional capacitance in the low fF range and a total accuracy budget of ±20 ppm at 25 °C, that residual 1.5 pF already consumes a meaningful slice of the budget. Practical fixes: choose a 9 pF CL crystal instead, or accept the error and calibrate the RTC in software. Also keep the Pierce feedback resistor at 1–10 MΩ and drive level at or below 1 µW.

2×12.5 − 3 − 0 = 22 pF → E12 22 pF (exact) → achieved CL 14.0 pF

💡 Tip. After the board comes back, measure instead of guessing: gate a frequency counter on the 1-pps output of the RTC or use the MCU's own clock-output pin, and aim within ±5 ppm of nominal at 25 °C. If the measured error is consistently low, the load is too heavy — drop C1 and C2 by one E12 step, about 20–25 ppm per step for an 18 pF AT-cut part.

Reference data

Reading the Package Table: Motional vs Shunt Capacitance in an Xtal Capacitor Calculator

Any serious xtal capacitor calculator needs package-level reference data, because the same CL printed on two different packages behaves differently at the terminals. The table below compiles the bands manufacturers quote for the four AT-cut package families you are most likely to buy. Use the last column as the starting pair before fine-tuning with the calculator — it already assumes C1 = C2.

AT-Cut Crystal — Typical Motional Capacitance by Package

Crystal Package	Fundamental Freq Range	Motional Cap CL	Shunt Cap C₀	Recommended Load Cap (per side)
HC-49SWinner	4–32 MHz	16–20 pF	3–5 pF	22–33 pF
HC-49U	1–200 MHz	14–18 pF	3–5 pF	18–27 pF
SM-49	1–50 MHz	18–25 pF	3–7 pF	22–39 pF
QFN/SMD	8–60 MHz	12–16 pF	2–4 pF	15–22 pF
LegacyHC-43/U and similar wire-lead styles — legacy through-hole AT-cut parts sharing the same load-capacitance physics, now largely replaced by HC-49S and surface-mount packages in new designs.

What Motional Capacitance Tells You

Motional capacitance is the electrical stand-in for the mechanical resonance of the quartz blank — the mass-and-spring system that makes the crystal a crystal. It sets how strongly the oscillation frequency responds to the load you hang on the terminals: the smaller the motional capacitance relative to CL, the gentler the pull, and the more stable the frequency against component tolerance. Datasheets report it for precision parts; for commodity crystals the package bands above are the practical proxy, which is why the column sits in the table at all. When a frequency-error budget is tight — GPS disciplined clocks, RF synthesis — ask the vendor for the actual motional figure instead of relying on package averages.

What Shunt Capacitance C₀ Tells You

Shunt capacitance C₀ is the static capacitance of the electrodes and holder, measured with the blank not resonating: 2–4 pF for QFN/SMD parts, 3–7 pF for SM-49. It matters twice. First, C₀ sits in parallel with your load network and is part of what the circuit must drive at all times. Second, C₀ caps how far the frequency can be pulled at all — once external capacitance dwarfs C₀, each additional picofarad buys less shift, and the oscillator's negative-resistance margin shrinks. The two series load capacitors halve on the way to the crystal — the same arithmetic the series-parallel capacitor calculator handles for any combination — so a "22 pF per side" recommendation is really a request for 11 pF of series capacitance at the crystal terminals.

📌 Layout matters. PCB stray capacitance Cstray is usually 3-8 pF — include this in your calculation or your crystal will load heavier than intended and frequency will pull low.

Close-up of a green printed circuit board with surface-mount crystals and capacitors

Shorter traces, lower CstrayPhoto: Unsplash

Tipping points

Crystal Frequency Pulling: Where the Numbers Tip Over

Load-capacitor values do not degrade gracefully — they cross tipping points. The first one is layout-driven. Take the Example 2 crystal: CL = 18 pF with Cpi = 1 pF on the pin. At Cstray = 3 pF the shortcut gives C1 = 2×18 − 3 − 1 = 32 pF; let the layout grow to Cstray = 8 pF — longer traces, a ground pour moved closer, a bigger pad — and the same formula gives 26 pF. Five picofarads of stray capacitance moved the purchase decision from a 33 pF standard value to a 27 pF standard value. One routing change, a different BOM line, and no schematic ever shows it.

The second tipping point is the pull-rate formula. Crystal frequency pulling follows Δf/f ≈ C1/(2·CL²)·ΔCL, where C1 here is the motional capacitance from the crystal datasheet — 2–20 fF for typical AT-cut blanks, not the external capacitors. For C1 = 0.015 pF (15 fF) and CL = 18 pF, the sensitivity works out to 0.015/(2×18²) ≈ 23 ppm per pF. Now connect that to the calculator's default result: the E12 rounding produces an achieved CL of 20.5 pF against an 18 pF target, a +2.5 pF error, so the crystal runs about 58 ppm low. That single rounding step consumes three times a standard ±20 ppm tolerance band — invisible on a multimeter, obvious on a GPS-disciplined counter.

Direction matters as much as magnitude: more load capacitance pulls the frequency low, less pulls it high. The 32.768 kHz watch crystal feels this the hardest because its ±20 ppm accuracy budget is small to begin with — 1 pF of load error there is comparable to the entire factory tolerance. The third tipping point is destructive rather than cosmetic: push the load far too large — 100 pF caps on an 18 pF crystal — and the loop's negative resistance, which must stay at least 4–5× the crystal's ESR (a 40 Ω part needs 160–200 Ω or more of margin), collapses toward zero. Start-up time stretches from 1–2 ms to hundreds of milliseconds, oscillation fails at temperature extremes or at low battery voltage, and the board ships with a crystal that never starts.

⚠️ Warning. Never use X7R, Y5V or Z5U ceramics as crystal load capacitors. Their capacitance swings 5–15% with applied voltage and temperature — on a 3.3 V rail that is a 1–3 pF wander on a 33 pF part, worth 25–75 ppm of clock drift between a cold morning and a hot afternoon. C0G/NP0 with ±2% or ±5% tolerance is the only acceptable dielectric here.

❌ Don't double-count. Cstray appears once in the shortcut formula — subtracting it per side (2×CL − 2×Cstray) undersizes the capacitors and pulls the frequency high. And don't copy another board's C1/C2 values without its layout: the same two 33 pF parts are correct on one PCB and 60 ppm off on the next, because stray capacitance is a property of the routing, not of the schematic.

On this site

More Crystal Capacitor Calculator Resources on This Site

If you arrived here searching for a crystal load capacitor calculator, bookmark two more pages before you close the tab. The main Capacitor Calculator home page decodes any part marking — ceramic codes, SMD EIA codes, color bands — and converts between pF, nF and µF, which is exactly what you need once the crystal calculation hands you a 33 pF value. The calculators hub lists every tool on the site, including the RC time constant calculator for the reset and bypass networks that share the crystal's corner of the schematic, and the series-parallel capacitor calculator for building an odd value like 27 pF from two standard parts when a trimmer is out of budget.

Crystal Oscillator Capacitor Calculator — Frequently Asked Questions

How do I calculate capacitor value for a crystal oscillator?▼

Read the load capacitance CL from the crystal datasheet, estimate PCB stray capacitance Cstray (3–5 pF is typical), then apply the equal-capacitor shortcut C1 = C2 ≈ 2×CL − Cstray − Cpi. For CL = 18 pF with Cstray = 4 pF and no input capacitance, that gives 32 pF, which rounds to the E12 standard value 33 pF. Buy two 33 pF C0G capacitors, one per crystal terminal.

What is a crystal load capacitor calculator used for?▼

A crystal load capacitor calculator converts a crystal's CL specification into actual capacitor part values: it subtracts PCB stray capacitance and pin input capacitance from 2×CL, rounds to the nearest E12 (or E24) standard value, and reports the load capacitance that standard value actually delivers. That last number tells you which way and how far the frequency will pull before you build the board.

Do Pierce and Colpitts need different capacitors?▼

No — when C1 = C2 the arithmetic is identical, which is why this calculator offers a Pierce/Colpitts toggle that changes only the labels and notes. In a Pierce oscillator the two capacitors sit from each crystal terminal to ground while the crystal runs inductive; in a Colpitts crystal oscillator the same two values form the capacitive divider of the tank. Only the ratio guidance differs: keep C1/C2 between 1:1 and 2:1 in either topology.

What CL does a 32.768 kHz watch crystal need?▼

Most 32.768 kHz tuning-fork crystals specify CL = 12.5 pF, with 6 pF and 9 pF variants for low-power RTC designs. For CL = 12.5 pF and Cstray = 3 pF, the calculation gives 2×12.5 − 3 = 22 pF per side — an exact E12 value. Watch crystals are unforgiving: their motional capacitance is tiny, so a 1 pF load error shifts the 32,768 Hz reference by tens of ppm and shows up as seconds of RTC drift per day.

What happens if my load capacitors are too large or too small?▼

Capacitors that are too large load the crystal heavier than specified, so frequency pulls low, loop gain drops, start-up time stretches from 1–2 ms to tens of milliseconds, and in the extreme case the oscillator stalls. Capacitors that are too small pull the frequency high and can over-drive the crystal. For a typical AT-cut part, each 1 pF of load error moves the frequency by roughly 20–25 ppm.

Do SMD crystals need different C1/C2 than HC-49S?▼

The CL specification governs the value, not the package. SMD crystals often carry lower shunt capacitance C₀ (2–4 pF vs 3–5 pF) and lower CL bands (8–18 pF vs 16–20 pF), so their capacitors come out smaller — an 8 pF SMD part with 2 pF stray needs 2×8 − 2 = 14 pF → 15 pF standard. SMD layouts also have shorter traces, so Cstray is usually 2–4 pF rather than 4–6 pF.

How does PCB stray capacitance change my crystal capacitors?▼

Every picofarad of stray capacitance is subtracted once in the shortcut formula, so it directly shrinks the external capacitors: with CL = 18 pF and Cpi = 1 pF, Cstray at 3 pF gives C1 = 32 pF while Cstray at 8 pF gives C1 = 26 pF — a move from a 33 pF to a 27 pF standard value. If you ignore stray capacitance entirely, the crystal loads heavier than intended and frequency pulls low by 50–100 ppm.

How much does frequency pull if CL is wrong?▼

Crystal frequency pulling follows Δf/f ≈ C1/(2·CL²)·ΔCL, where C1 is the motional capacitance from the crystal datasheet. With C1 = 0.015 pF (15 fF) and CL = 18 pF, that is about 23 ppm per pF of load error. The default example on this page achieves CL = 20.5 pF against an 18 pF target — a +2.5 pF error worth roughly 58 ppm low, three times a standard ±20 ppm tolerance band.

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