Ripple-limited C
During each PWM half-cycle the inverter draws a current step. The capacitor must supply this step while the bus voltage stays within your allowable ripple band.
P = rated power in W · Δt = 1/(2·f_sw) for 3-phase SVPWM · ΔV = Vdc × ripple %.
Example: 15 kW, 600 V, 10 kHz, 10% ripple → Δt = 50 µs, ΔV = 60 V → C = 15000 × 50×10⁻⁶ / (600 × 60) = 20.8 µF minimum — but you will parallel multiple caps for RMS handling.